It is impossible to pass Oracle 1Z0-489 exam without any help in the short term. Come to Testking soon and find the most advanced, correct and guaranteed Oracle 1Z0-489 practice questions. You will get a surprising result by our Avant-garde SPARC M6-32 and SPARC M5-32 Servers Installation Essentials practice guides.


♥♥ 2017 NEW RECOMMEND ♥♥

Free VCE & PDF File for Oracle 1Z0-489 Real Exam (Full Version!)

★ Pass on Your First TRY ★ 100% Money Back Guarantee ★ Realistic Practice Exam Questions

Free Instant Download NEW 1Z0-489 Exam Dumps (PDF & VCE):
Available on: http://www.surepassexam.com/1Z0-489-exam-dumps.html

Q1. Assuming that HOST2 is composed of only DCU2, which two targets report the type of CPUs that belong to this DCU? 

A. /System/DCUs/DCU_2 cpu- summary 

B. /System/Processor type 

C. /Servers/PDomains/PDoma1n_2/System/Processors summary- description 

D. /Servers/DCU_2/Processors model 

Answer: A,D 

Reference: 

http://docs.oracle.com/cd/E19102-01/n810.srvr/819-2741-10/subassembly_hot_replace.html 


Q2. Which three statements are correct about data paths in the SPARC M5-32 server? 

A. Within a DCU, a CPU talks to another CPU directly by using the coherency switch. The SSB is not needed. 

B. From one DCU to a different DCU, an even talks with only another even (same for odd) and hops to the odd-numbered board, if needed, on the destination DCU. 

C. From one DCU to a different DCU, all CPUs can access all PCIe slots In the destination DCU directly in one hop. 

D. A DCU can communicate data only with other DCUs via the BX ASICs on the SSB. 

E. From one DCU to a different DCU, even CPUs can access ail the odd PCIe slots in the destination DCU directly in one hop. 

Answer: A,C,D 

Reference: http://docs.oracle.com/cd/B10501_01/server.920/a96533/statspac.htm 


Q3. Your customer declines installation of the potential equalization cable that is recommended in the Enterprise Installation Standards (EIS) guidelines. What should you do? 

A. Refuse to perform the installation until the customer adheres to the EIS guidelines, 

B. Install the system regardless of the customer's decision. 

C. Continue with the installation, but note the customer's decision in the sign-off document. 

D. Do a review of the existing grounding steps taken, and then proceed with the installation. 

Answer:


Q4. Given a SPARC M5-32 server in which each CMU has 2x M5 processors, each processor has 2x memory controllers, and each memory controller can have 2x BoB, how many memory modules/ sections can there be in each CMU? 

A. l 

B. 2 

C. 4 

D. 8 

Answer:


Q5. Use of the Enterprise Installation Standards (EIS) methodology provides a way to 

A. Create a framework for tracking improperly installed systems 

B. Produce consistent, high-quality installations 

C. Produce systems optimized for Oracle software departments 

D. Create a framework for tracking properly installed systems 

Answer:


Q6. Before you can configure the service processors, which three pieces of information do you need from the customer? 

A. SP0 IP address 

B. SP1 IP address 

C. domain IP address 

D. Active SP IP address 

E. clock board IP address 

Answer: A,C,D 

Reference: 

https://docs.oracle.com/cd/E19469-01/820-6413-13/IPMI_Overview.html 


Q7. There, unbounded PDoms and bounded PDoms on a SPARC M5-32 mm. which three statements are correct? 

A. Bounded PDoms have lower latency, and loss of any SSB has no effect. 

B. Bounded PDoms have lower latency. You can form a bounded PDom with I6x M5 CPUs, by combining 2x DCU. 

C. Unbounded PDoms are expandable beyond 8x M5 CPUs; and SSB stores L3$ directory for fasterlookup. 

D. Both an unbounded and a bounded PDom operate like an independent server that has full hardware isolation from other PDoms on the server. 

E. A PDom can be dynamically switched between bounded and unbounded. 

Answer: A,D,E 

Reference: 

http://www.oracle.com/technetwork/server-storage/sun-sparc-enterprise/documentation/o13-024-m5-32-architecture-1920556.pdf 


Q8. A customer reports that they have noticed an alert light on the CMU# 10. Which CPUs may be affected by issues within this CPU memory unit? 

A. CPU#10, CPU# 11, CPU#12, CPU#13 

B. CPU#22, CPU#23 

C. CPU#20, CPU#21, 

D. CPU#20, CPU=21 

Answer:

Reference: 

https://docs.oracle.com/cd/E24355_01/html/E41214/bbgebhfe.html 


Q9. Which three options are supported memory population options for the SPARC M5-32 server? 

A. CMU with no memory/DIMM populated 

B. CMU with 1/4 populated with DIMM Q 

C. CMU with 1/2 populated with DIMM 

D. CMU with full populated with DIMM 

E. CMU with 1/8 populated with DIMM 

Answer: B,C,E 


Q10. Your customer is asking you the reason for using the EIS methodology to manage their installation. Which statement is true regarding using the Installation Configuration Plan as part of the methodology? 

A. It enables you to define your test procedures to ensure successful installation. 

B. It enables you to define your system configuration: boot disk layout, networking, and physical domains. 

C. It enables you to perform an in-depth site analysis. 

D. It allows you to perform final sign-off with the customer after the installation is complete. 

Answer: